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NXP TDA19978A四路HDMI 1.4a接收解决方案

来源: eccn
2019-08-20
类别:工业控制
eye 59
文章创建人 拍明

原标题:NXP TDA19978A四路HDMI 1.4a接收解决方案

  nxp 公司的TDA19978A集成了均衡器的四路HDMI 1.4a兼容的接收器,并嵌入了EDID存储器,内置的均衡器可改善信号质量,使0.5 mm (24 AWG)电缆长达25米。TDA19978A和标准HDMI 1.4a, DVI 1.0, CEA-861-D 以及HDCP 1.4兼容,HDMI频率高达250MHz,主要用在HDTV,高端TV,YCbCr 或RGB高速视频数字化仪,家庭影院,投映电视,等离子电视和LCD TV等。本文介绍了TDA19978A主要特性,方框图,应用案例框图和应用电路图。

  TDA19978A:Quad HDMI 1.4a receiver interface with equalizer (HDTV up to 1080p, up to UXGA for PC formats)

  The TDA19978A is a four input HDMI 1.4a compliant receiver with embedded EDID memory. The built in auto-adaptive equalizer improves signal quality and allows the use of cable lengths up to 25 m (laboratory tested with a 0.5 mm (24 AWG) cable at 2.05 gigasamples per second). The HDCP key set is stored in non-volatile One Time Programmable (OTP) memory for maximum security. In addition, the TDA19978A is delivered with software drivers to ease configuration and use.

  The TDA19978A supports:

  • TV resolutions:

  – 480i (1440 480i at 60 Hz), 576i (1440  576i at 50 Hz) to HDTV (up to 1920 1080p at 50/60 Hz)

  – WUXGA (1920 1200p at 60 Hz) reduced blanking format

  • PC resolutions:

  – VGA (640 480p at 60 Hz) to UXGA (1600 1200p at 60 Hz)

  • Deep Color mode in 10-bit and 12-bit (up to 205 MHz TMDS clock)

  • Gamut boundary description

  • IEC 60958/IEC 61937, One Bit Audio (in SACD), DST (in compressed DSD) and HBR stream

  The TDA19978A includes:

  • An enhanced PC and TV format recognition system

  • Generation of a 128/256/512  fs system clock allowing the use of simple audio DACs without an integrated PLL (such as the UDA1334BTS)

  • An embedded oscillator (an external crystal can also be used)

  • Improved audio clock generation using an external reference clock

  • One Bit Audio (in SACD), DST (in compressed DSD) and HBR stream support

  The TDA19978A converts HDMI streams with or without HDCP into RGB or YCbCr digital signals. The YCbCr digital output signal can be 4:4:4 or 4:2:2 semi-planar format based on the ITU-R BT.601 standard or 4:2:2 based on the ITU-R BT.656 format. The device can adjust the output timing of the video port by altering the values for tsu(Q) and th(Q). In addition, all settings are controllable using the I2C-bus.

  TDA19978A主要特性:

  Complies with the HDMI 1.4a, DVI 1.0, CEA-861-D and HDCP 1.4 standards

  Four (quad) independent HDMI inputs, up to the HDMI frequency of 205 MHz

  Embedded auto-adaptive equalizer on all HDMI links

  EDID memory: 253 shared bytes and three bytes dedicated to each HDMI input

  Supports color depth processing (8-bit, 10-bit or 12-bit per color)

  Color gamut metadata packet with interrupt on each update, readable via the I2C-bus

  Up to four S/PDIF or I2S-bus outputs (eight channels) at a sampling rate up to 192 kHz with IEC 60958/IEC 61937 stream

  HBR audio stream up to 768 kHz with four demultiplexed S/PDIF or I2S-bus outputs

  HBR streams (compatible with DTS-HD master audio and Dolby TrueHD up to eight channels due to HBR packet for stream with a frame rate up to 768 kHz) support

  DSD and DST audio stream up to six DSD channels output for SACD with DST Audio Packet support

  Channel status decoder supports multi-channel reception

  Improved audio clock generation using an external reference clock

  System/master clock output (128/256/512 fs) enables the use of the UDA1334BTS

  The HDMI interface supports:

  All HDTV formats up to 1920 1080p at 50/60 Hz and WUXGA (1920 1200p at 60 Hz) with support for reduced blanking

  3D formats including all primary formats up to 1920 1080p at 30 Hz Frame Packing and 1920 1080p at 60 Hz Top-and-Bottom

  PC formats up to UXGA (1600 1200p at 60 Hz)

  Embedded oscillator (an external crystal can be used)

  Frame and field detection for interlaced video signal

  Sync timing measurements for format recognition

  Improved system for measurements of blanking and video active area allowing an accurate recognition of PC and TV formats

  HDCP with repeater capability

  Embedded non-volatile memory storage of HDCP keys

  Programmable color space input signal conversion from RGB-to-YCbCr or YCbCr-to-RGB

  Output formats: RGB 4:4:4, YCbCr 4:4:4, YCbCr 4:2:2 semi-planar based on the ITU-R BT.601 standard and YCbCr 4:2:2 ITU-R BT.656

  8-bit, 10-bit or 12-bit output formats selectable using the I2C-bus (8-bit and 10-bit only in 4:4:4 format)

  I2C-bus adjustable timing of video port (tsu(Q) and th(Q))

  Downsampling-by-two with selectable filters on Cb and Cr channels in 4:2:2 mode

  Internal video and audio pattern generator

  Controllable using the I2C-bus; 5 V tolerant and bit rate up to 400 kbit/s

  DDC-bus inputs 5 V tolerant and bit rate up to 400 kbit/s

  LV-TTL outputs

  Power-down mode

  CMOS process

  1.8 V and 3.3 V power supplies

  Lead-free (Pb) HLQFP144 package

  TDA19978A应用:

  HDTV 

  High-End TV

  YCbCr or RGB HI-Speed video digitizer 

  Home theater amplifier

  Projector, plasma and LCD TV

  DVD recorder

  Rear projection TV

  AVR and HDMI splitter

  图1。TDA19978A方框图

  图2。TDA19978A四个HDMI输入共享EDID存储器的应用案例框图

  图3。TDA19978A三个HDMI输入共享EDID存储器的应用案例框图

  图4。TDA19978A应用框图



责任编辑:HanFeng

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标签: NXP 接收器 TDA19978A

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