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Xilinx ML623 Virtex-6 FPGA GTX收发器方案

来源：中电网

2019-11-22

类别：工业控制

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拍明

原标题：Xilinx ML623 Virtex-6 FPGA GTX收发器方案

　　xilinx 公司的Virtex-6 FPGA是最低功耗高性能FPGA，包括LXT，SXT和HXT三个系列，采用和40nm铜工艺和六输入查找表(LUT)技术，具有先进的高性能FPGA逻辑，1.2 - 2.5V I/O工作，具有史无前例的逻辑，DSP，互连和软微处理器特性，能满足高性能逻辑设计，高性能DSP设计和高性能嵌入系统设计的需求，主要应用在有线通信，无线通信以及广播等高性能高带宽领域。本文介绍了Virtex-6 FPGA主要特性，以及在有线通信，无线通信以及广播等领域的应用框图;同时还介绍了ML623 Virtex-6 FPGA GTX收发器特征板主要特性，方框图，详细电路图和材料清单(BOM)。

　　The Virtex®-6 family provides the newest, most advanced features in the FPGA market. Virtex-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components to enable designers to focus on innovation as soon as their development cycle begins. Using the third-generation ASMBL™ (Advanced Silicon Modular Block) columnbased architecture, the Virtex-6 family contains multiple distinct sub-families. This overview covers the devices in the LXT, SXT, and HXT sub-families. Each sub-family contains a different ratio of features to most efficiently address the needs of a wide variety of advanced logic designs. In addition to the high-performance logic fabric, Virtex-6 FPGAs contain many built-in system-level blocks. These features allow logic designers to build the highest levels of performance and functionality into their FPGA-based systems. Built on a 40 nm state-of-theart copper process technology, Virtex-6 FPGAs are a programmable alternative to custom ASIC technology. Virtex-6 FPGAs offer the best solution for addressing the needs of high-performance logic designers, high-performance DSP designers, and high-performance embedded systems designers with unprecedented logic, DSP, connectivity, and soft microprocessor capabilities.

　　Virtex-6 FPGA 主要特性：

　　• Three sub-families:

　　• Virtex-6 LXT FPGAs: High-performance logic with advanced serial connectivity

　　• Virtex-6 SXT FPGAs: Highest signal processing capability with advanced serial connectivity

　　• Virtex-6 HXT FPGAs: Highest bandwidth serial connectivity

　　• Compatibility across sub-families

　　• LXT and SXT devices are footprint compatible in the same package

　　• Advanced, high-performance FPGA Logic

　　• Real 6-input look-up table (LUT) technology

　　• Dual LUT5 (5-input LUT) option

　　• LUT/dual flip-flop pair for applications requiring rich register mix

　　• Improved routing efficiency

　　• 64-bit (or two 32-bit) distributed LUT RAM option per 6-input LUT

　　• SRL32/dual SRL16 with registered outputs option

　　• Powerful mixed-mode clock managers (MMCM)

　　• MMCM blocks provide zero-delay buffering, frequency synthesis, clock-phase shifting, inputjitter filtering, and phase-matched clock division

　　• 36-Kb block RAM/FIFOs

　　• Dual-port RAM blocks

　　• Programmable

　　- Dual-port widths up to 36 bits

　　- Simple dual-port widths up to 72 bits

　　• Enhanced programmable FIFO logic

　　• Built-in optional error-correction circuitry

　　• Optionally use each block as two independent 18 Kb blocks

　　• High-performance parallel SelectIO™ technology

　　• 1.2 to 2.5V I/O operation

　　• Source-synchronous interfacing using ChipSync™ technology

　　• Digitally controlled impedance (DCI) active termination

　　• Flexible fine-grained I/O banking

　　• High-speed memory interface support with integrated write-leveling capability

　　• Advanced DSP48E1 slices

　　• 25 x 18, two’s complement multiplier/accumulator

　　• Optional pipelining

　　• New optional pre-adder to assist filtering applications

　　• Optional bitwise logic functionality

　　• Dedicated cascade connections

　　• Flexible configuration options

　　• SPI and Parallel Flash interface

　　• Multi-bitstream support with dedicated fallback reconfiguration logic

　　• Automatic bus width detection

　　• System Monitor capability on all devices

　　• On-chip/off-chip thermal and supply voltage monitoring

　　• JTAG access to all monitored quantities

　　• Integrated interface blocks for PCI Express® designs

　　• Compliant to the PCI Express Base Specification 2.0

　　• Gen1 (2.5 Gb/s) and Gen2 (5 Gb/s) support with GTX transceivers

　　• Endpoint and Root Port capable

　　• x1, x2, x4, or x8 lane support per block

　　• GTX transceivers: up to 6.6 Gb/s

　　• Data rates below 480 Mb/s supported by oversampling in FPGA logic.

　　• GTH transceivers: 2.488 Gb/s to beyond 11 Gb/s

　　• Integrated 10/100/1000 Mb/s Ethernet MAC block

　　• Supports 1000BASE-X PCS/PMA and SGMII using GTX transceivers

　　• Supports MII, GMII, and RGMII using SelectIO technology resources

　　• 2500Mb/s support available

　　• 40 nm copper CMOS process technology

　　• 1.0V core voltage (-1, -2, -3 speed grades only)

　　• Lower-power 0.9V core voltage option (-1L speed grade only)

　　• High signal-integrity flip-chip packaging available in standard or Pb-free package options

　　Virtex-6 FPGA 产品型号列表：

　　有线通信应用：

　　Virtex-6 FPGAs provide all the capabilities you need to develop products for a green central office.

　　• Reach higher performance and bandwidth within existing power and cooling footprints

　　• Integrate packet-processing and traffic-management functions with faster and wider data paths that satisfy tough throughput and latency requirements

　　• Simplify interfacing to DDR3, RLDRAM, and QDR SRAM with SelectIO™ technology

　　• Implement 40G and 100G bridging with IP for key protocols and flexible serial transceivers supporting line rates above 10Gbps

　　无线基础设备：

　　Virtex-6 FPGAs help you to reduce cost and power consumption, deliver scalable platforms, and support multiple air interface standards.

　　• Integrate crest factor reduction (CFR) and digital pre-distortion (DPD) algorithms to increase power amplifier efficiency up to 45% for reduced OPEX

　　• Reduce power consumption by over 50% compared to ASSP-based implementation by integrating radio function into a single FPGA with the optimal balance of logic, memory, and DSP resources

　　• Deliver flexible, multi-mode base stations that simplify the carriers’ challenge of supporting multiple air interfaces

　　• Accelerate implementation with reusable IP for DUC/DDC, CFR, DPD, OBSAI, and CPRI

　　广播设备：

　　Combine Virtex-6 and Spartan-6 FPGAs to build lower-cost IP-based equipment that bridges between broadcast and telecommunications networks.

　　• Reduce cost per-channel by integrating interfaces, codecs, and video processing algorithms in high-capacity FPGAs

　　• Differentiate your system with improved video quality enabled by integrated DSP resources

　　• Aggregate multiple uncompressed SDI video streams up to full 1080p60 HD onto 10Gbps Ethernet networks, or bridge multiple compressed ASI streams onto 1Gbps Ethernet for triple-play services using integrated low-power transceivers

　　• Accelerate implementation with reference designs for triple-rate SDI, audio mux/demux, and more

　　ML623 Virtex-6 FPGA GTX收发器特征板

　　ML623 Virtex-6 FPGA GTX Transceiver Characterization Board

　　Xilinx ML623 kit is ideal for characterization and evaluation of Virtex®-6 LXT FPGA GTX Transceivers. This kit provides access to every GTX Transceiver available on the on-board LX240T FPGA. Each GTX Transceiver is accessible through 4 SMA connectors。

　　The ML623 board provides the hardware environment for characterizing and evaluating the GTX transceivers available on the Virtex®-6 XC6VLX240T-2FFG1156C FPGA.

　　ML623板主要特性：

　　• Virtex-6 XC6VLX240T-2FFG1156C FPGA

　　• On-board power supplies for all necessary voltages

　　• Power supply jacks for optional use of external power supplies

　　• JTAG configuration port for use with Platform Cable USB or Parallel Cable III/IV cables

　　• System ACE™ controller

　　• Power module supporting all Virtex-6 FPGA GTX transceiver power requirements

　　• A fixed, 200 MHz 2.5V LVDS oscillator wired to global clock inputs

　　• Two single-ended global clock inputs with SMA connectors

　　• Two pairs of differential global clock inputs with SMA connectors

　　• SuperClock-2 module supporting multiple frequencies

　　• 40 pairs of SMA connectors for the GTX transceivers