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Cypress CY3280-22x45通用CapSense控制器开发方案

来源: eccn
2019-06-13
类别:工业控制
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文章创建人 拍明

原标题:Cypress CY3280-22x45通用CapSense控制器开发方案

  cypress公司的CY3280-22x45汽车级PSoC 可编程片上系统,包含多个可配置的模拟和数字逻辑模块,以及可编程互连。PSoC 采用功能强大的哈佛架构处理器,M8C处理器速度高达24MHz,8x8乘法器,32位累加器,可使用户能够根据每个应用的要求,来创建定制的外设配置, 具有广泛的应用。本文介绍了CY3280-22x45主要特性,方框图以及通用CapSense控制器开发套件主要特性,电路图,材料清单,PCB布局图和元件分布图.

  PSoC 可编程片上系统系列产品包含许多器件。 这些器件旨在使用一个低成本的单芯片可编程组件取代多个基于 MCU 的传统系统组件。 PSoC 器件包含多个可配置的模拟和数字逻辑模块,以及可编程互连。 这种架构使得用户能够根据每个应用的要求,来创建定制的外设配置。 此外,在一系列方便易用的引脚布局和封装中还包含快速 CPU、闪速程序存储器、SRAM 数据存储器和可配置的 I/O。

  CY3280-22x45主要特性:

  ■ Automotive Electronics Council (AEC) Q100 qualified

  ■ Powerful Harvard-architecture processor

  ❐ M8C processor speeds up to 24 MHz

  ❐ 8 × 8 multiply, 32-bit accumulate

  ❐ Low power at high speed

  ❐ Automotive A-grade: 3.0 V to 5.25 V operation at –40 ℃ to +85 ℃ temperature range

  ❐ Automotive E-grade: 4.75 V to 5.25 V operation at –40 ℃ to +125 ℃ temperature range

  ■ Advanced peripherals (PSoC® blocks)

  ❐ Six analog Type ‘E’ PSoC blocks provide:

  • Up to four comparators with digital-to-analog converters (DAC) references

  • Up to 10-bit single or dual analog-to-digital converters (ADCs)

  ❐ Up to eight digital PSoC blocks provide:

  • 8 to 32-bit timers, counters, and pulse width modulators (PWMs)

  • One-shot, multi-shot mode in timers and PWMs

  • PWM with deadband in one digital block

  • Shift register, cyclical redundancy check (CRC), and pseudo random sequence (PRS) modules

  • Full- or half-duplex UARTs

  • SPI masters or slaves, 8- to 16-bit variable data length

  • Connectable to all general-purpose I/O (GPIO) pins

  ❐ Complex peripherals by combining blocks

  ❐ Powerful synchronization support, analog module operations can be synchronized by digital blocks or external signals.

  ■ High-speed 10-bit successive approximation register (SAR) ADC with sample and hold optimized for embedded control

  ■ Precision, programmable clocking

  ❐ Internal oscillator up to 24 MHz

  ❐ High accuracy 24 MHz with optional 32-kHz crystal and phase locked loop (PLL)

  ❐ Optional external oscillator, up to 24 MHz

  ❐ Internal low speed, low-power oscillator for watchdog and sleep functionality

  ■ Flexible on-chip memory

  ❐ Up to 16 KB flash program storage, 1000 erase/write cycles

  ❐ Up to 1 KB SRAM data storage

  ❐ In-System Serial Programming (ISSP)

  ❐ Partial flash updates

  ❐ Flexible protection modes

  ❐ EEPROM emulation in flash

  ■ Optimized CapSense® resource

  ❐ Supports two CapSense channels with simultaneous scanning

  ❐ Two current DACs provide programmable sensor tuning in firmware

  ❐ Two dedicated clock resources for CapSense Features

  ■ Automotive Electronics Council (AEC) Q100 qualified

  ■ Powerful Harvard-architecture processor

  ❐ M8C processor speeds up to 24 MHz

  ❐ 8 × 8 multiply, 32-bit accumulate

  ❐ Low power at high speed

  ❐ Automotive A-grade: 3.0 V to 5.25 V operation at –40 ℃ to +85 ℃ temperature range

  ❐ Automotive E-grade: 4.75 V to 5.25 V operation at –40 ℃ to +125 ℃ temperature range

  ■ Advanced peripherals (PSoC® blocks)

  ❐ Six analog Type ‘E’ PSoC blocks provide:

  • Up to four comparators with digital-to-analog converters (DAC) references

  • Up to 10-bit single or dual analog-to-digital converters (ADCs)

  ❐ Up to eight digital PSoC blocks provide:

  • 8 to 32-bit timers, counters, and pulse width modulators (PWMs)

  • One-shot, multi-shot mode in timers and PWMs

  • PWM with deadband in one digital block

  • Shift register, cyclical redundancy check (CRC), and pseudo random sequence (PRS) modules

  • Full- or half-duplex UARTs

  • SPI masters or slaves, 8- to 16-bit variable data length

  • Connectable to all general-purpose I/O (GPIO) pins

  ❐ Complex peripherals by combining blocks

  ❐ Powerful synchronization support, analog module operations can be synchronized by digital blocks or external signals.

  ■ High-speed 10-bit successive approximation register (SAR) ADC with sample and hold optimized for embedded control

  ■ Precision, programmable clocking

  ❐ Internal oscillator up to 24 MHz

  ❐ High accuracy 24 MHz with optional 32-kHz crystal and phase locked loop (PLL)

  ❐ Optional external oscillator, up to 24 MHz

  ❐ Internal low speed, low-power oscillator for watchdog and sleep functionality

  ■ Flexible on-chip memory

  ❐ Up to 16 KB flash program storage, 1000 erase/write cycles

  ❐ Up to 1 KB SRAM data storage

  ❐ In-System Serial Programming (ISSP)

  ❐ Partial flash updates

  ❐ Flexible protection modes

  ❐ EEPROM emulation in flash

  ■ Optimized CapSense® resource

  ❐ Supports two CapSense channels with simultaneous scanning

  ❐ Two current DACs provide programmable sensor tuning in firmware

  ❐ Two dedicated clock resources for CapSense

  图1.CY3280-22x45方框图

  CY3280-22x45通用CapSense控制器开发套件

  This kit showcases the features of CY3280-22X45. The CY3280-22X45 family of PSoC® includes the following devices: CY8C21345-24SXI, CY8C22345-24SXI, and CY8C22545-24AXI. The 56-pin OCD part is assembled in the CY3280-22X45 Universal CapSense Controller Board. This part is used only for in-circuit debugging.

  The CapSense feature of CY8C22X45 can be implemented with the CY3280-SLM Universal CapSense Linear Slider Module. The two boards are connected by a 44-pin connector. The other features of CY3280-22X45 can be implemented with the CY3280-CPM1 Universal CapSense Plus Controller Module. The two boards are connected by a 40-pin connector. The CY3280-SLM Universal CapSense Linear Slider Module and the CY3280-CPM1 Universal CapSense Plus Controller Module can be connected with the CY3280-22X45 Universal CapSense Controller Board simultaneously.

  图2.CapSense控制器开发板外形图

  CY3280-22X45 Universal CapSense Controller Board

  CapSense控制器开发套件包括:

  ■CY3280-22X45 Universal CapSense Controller Board

  ■Printed Documents

  ■CY3280-22X45 Universal CapSense Controller Board CD

  ■CY3240-I2CUSB Board

  ■CY3210-MiniProg1 Programmer

  CapSense控制器开发板材料清单(BOM):





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