单片机分类_单片机价格,品牌-拍明芯城

R5F21364CNFP#X4

瑞萨

IC MCU 16BIT 1...

http://www.renesas.com

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XU232-1024-FB324-...

XMOS

IC MCU 1024KB ...

http://www.xmos.com

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TMS87PC510

德州仪器

IC CMOS OTP 64...

http://www.ti.com

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PK60DX256ZVMC10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 256 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 64 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital-converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog-converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick , ,Connectivity and Communications , , IEEE 1588 Ethernet MAC with hardware time stamping provides precision clock synchronization for real-time industrial control , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external comp " > The K60 MCU fa...

http://www.nxp.com

待上传图片

PK60DX256ZVMD10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 256 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 64 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital-converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog-converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick , ,Connectivity and Communications , , IEEE 1588 Ethernet MAC with hardware time stamping provides precision clock synchronization for real-time industrial control , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external comp " > The K60 MCU fa...

http://www.nxp.com

待上传图片

PK61FN1M0VMJ12

恩智浦/飞思卡尔

The Kinetis K6...

http://www.nxp.com

待上传图片

PK60DN512ZVLQ10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 256 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 64 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital-converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog-converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick , ,Connectivity and Communications , , IEEE 1588 Ethernet MAC with hardware time stamping provides precision clock synchronization for real-time industrial control , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external comp " > The K60 MCU fa...

http://www.nxp.com

待上传图片

PK60DN512ZVMC10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 256 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 64 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital-converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog-converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick , ,Connectivity and Communications , , IEEE 1588 Ethernet MAC with hardware time stamping provides precision clock synchronization for real-time industrial control , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external comp " > The K60 MCU fa...

http://www.nxp.com

待上传图片

PK60DX256VLL10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 256 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 64 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital-converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog-converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick , ,Connectivity and Communications , , IEEE 1588 Ethernet MAC with hardware time stamping provides precision clock synchronization for real-time industrial control , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external comp " > The K60 MCU fa...

http://www.nxp.com

待上传图片

PK60DX256VLQ10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 256 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 64 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital-converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog-converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick , ,Connectivity and Communications , , IEEE 1588 Ethernet MAC with hardware time stamping provides precision clock synchronization for real-time industrial control , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external comp " > The K60 MCU fa...

http://www.nxp.com

待上传图片

PK60DX256VMD10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 256 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 64 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital-converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog-converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick , ,Connectivity and Communications , , IEEE 1588 Ethernet MAC with hardware time stamping provides precision clock synchronization for real-time industrial control , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external comp " > The K60 MCU fa...

http://www.nxp.com

待上传图片

PK60DX256ZVLL10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 256 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 64 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital-converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog-converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick , ,Connectivity and Communications , , IEEE 1588 Ethernet MAC with hardware time stamping provides precision clock synchronization for real-time industrial control , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external comp " > The K60 MCU fa...

http://www.nxp.com

待上传图片

PK60DX256ZVLQ10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 256 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 64 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital-converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog-converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick , ,Connectivity and Communications , , IEEE 1588 Ethernet MAC with hardware time stamping provides precision clock synchronization for real-time industrial control , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external comp " > The K60 MCU fa...

http://www.nxp.com

待上传图片

PK60DN512VLQ10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 256 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 64 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital-converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog-converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick , ,Connectivity and Communications , , IEEE 1588 Ethernet MAC with hardware time stamping provides precision clock synchronization for real-time industrial control , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external comp " > The K60 MCU fa...

http://www.nxp.com

待上传图片

PK60DN512VMD10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 256 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 64 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital-converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog-converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick , ,Connectivity and Communications , , IEEE 1588 Ethernet MAC with hardware time stamping provides precision clock synchronization for real-time industrial control , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external comp " > The K60 MCU fa...

http://www.nxp.com

待上传图片

PK60DN512ZCAB10R

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 256 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 64 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital-converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog-converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick , ,Connectivity and Communications , , IEEE 1588 Ethernet MAC with hardware time stamping provides precision clock synchronization for real-time industrial control , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external comp " > The K60 MCU fa...

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PK60DN512ZVLL10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 256 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 64 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital-converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog-converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick , ,Connectivity and Communications , , IEEE 1588 Ethernet MAC with hardware time stamping provides precision clock synchronization for real-time industrial control , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external comp " > The K60 MCU fa...

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PK40DN512ZVLQ10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/b " > The K40 MCU fa...

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PK40DN512ZVMD10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/b " > The K40 MCU fa...

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PK40DX256VLK7

恩智浦/飞思卡尔

The Kinetis K4...

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PK40DX256VLQ10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/b " > The K40 MCU fa...

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PK40DX256VMD10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/b " > The K40 MCU fa...

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PK40DX256ZVLQ10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/b " > The K40 MCU fa...

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PK40DX256ZVMD10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/b " > The K40 MCU fa...

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PK30DX256ZVMD10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/backplane reassignment provides pin-out flexibility easing PCB design and al " > The K30 MCU fa...

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PK40DN512VLK10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/b " > The K40 MCU fa...

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PK40DN512VLL10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/b " > The K40 MCU fa...

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PK40DN512VLQ10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/b " > The K40 MCU fa...

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PK40DN512VMD10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/b " > The K40 MCU fa...

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PK40DN512ZVLK10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/b " > The K40 MCU fa...

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PK30DN512VLQ10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/backplane reassignment provides pin-out flexibility easing PCB design and al " > The K30 MCU fa...

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PK30DN512ZVLK10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/backplane reassignment provides pin-out flexibility easing PCB design and al " > The K30 MCU fa...

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PK30DN512ZVLL10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/backplane reassignment provides pin-out flexibility easing PCB design and al " > The K30 MCU fa...

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PK30DN512ZVLQ10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/backplane reassignment provides pin-out flexibility easing PCB design and al " > The K30 MCU fa...

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PK30DN512ZVMD10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/backplane reassignment provides pin-out flexibility easing PCB design and al " > The K30 MCU fa...

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PK30DX256ZVLQ10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , , Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/backplane reassignment provides pin-out flexibility easing PCB design and al " > The K30 MCU fa...

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PK20DN512VLK10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of usersegmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM™ Cortex®-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , ,Connectivity and Communications , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external components from 5 volts input , , Up to six UAR " > The K20 MCU fa...

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PK20DN512ZVLK10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of usersegmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM™ Cortex®-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , ,Connectivity and Communications , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external components from 5 volts input , , Up to six UAR " > The K20 MCU fa...

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PK20DX128VMP5

恩智浦/飞思卡尔

<270 ua="" mhz="" 4="" 181="" s="" wake-up="" from="" stop="" mode="">270> 190> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 32 KB-128 KB flash. Fast access, high reliability with 4-level security protection , , Up to 16 KB of SRAM , , FlexMemory: Up to 2 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss or corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, FlexNVM from 32 KB for extra program code, data or EEPROM backup. , ,Mixed-Signal Capability , , High-speed 16-bit ADC with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up to two high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Optional analog voltage reference provides an accurate reference to analog blocks and replaces external voltage references to reduce system cost , ,Performance , , 50 MHz ARM® Cortex®-M4 core with DSP instruction set, single cycle MAC and single instruction multiple data (SIMD) extensions. , , Up to 4-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to two FlexTimers with a total of 10 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick. , ,Connectivity and Communications , , Full-speed USB Device/Host/On-The-Go with device charge detect capability , , Optimized charging current/time for portable USB devices, enabling l " > The 50 MHz ent...

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PK20DX256VLL7

恩智浦/飞思卡尔

The Kinetis K2...

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PK20DX256ZVLK10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB - 512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4KB of usersegmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM™ Cortex®-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , ,Connectivity and Communications , , USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external components from 5 volts input , , Up to six UAR " > The K20 MCU fa...

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PK10DX128VLH5

恩智浦/飞思卡尔

<270 ua="" mhz="" 4="" 181="" s="" wake-up="" from="" stop="" mode="">270> 190> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 32 KB-128 KB flash. Fast access, high reliability with 4-level security protection , , Up to 16 KB of SRAM , , FlexMemory: Up to 2 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss or corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, FlexNVM from 32 KB for extra program code, data or EEPROM backup. , ,Mixed-Signal Capability , , High-speed 16-bit ADC with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up to two high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Optional analog voltage reference provides an accurate reference to analog blocks and replaces external voltage references to reduce system cost , ,Performance , , 50 MHz ARM® Cortex™-M4 core with DSP instruction set, single cycle MAC and single instruction multiple data (SIMD) extensions. , , Up to 4-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to two FlexTimers with a total of 10 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , ,Connectivity and Communications , , Up to three UARTs. One UART supports RS232 with flow control, RS485, ISO7816 and IrDA. All other two UARTS support RS232 with flow control and RS485 , , One inter-IC Sound (I,2,S) serial interface for audio system interfa " > The 50 MHz ent...

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PK10DX256VLQ10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB-512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up to two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , ,Connectivity and Communications , , Up to six UARTs with IrDA support including one UART with ISO7816 smart card support. Variety of data size, format and transmission/reception settings supported for multiple industrial communication protoc " > The K10 MCU fa...

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PK10DX256VMD10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB-512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up to two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , ,Connectivity and Communications , , Up to six UARTs with IrDA support including one UART with ISO7816 smart card support. Variety of data size, format and transmission/reception settings supported for multiple industrial communication protoc " > The K10 MCU fa...

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PK10DX256ZVLQ10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB-512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up to two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , ,Connectivity and Communications , , Up to six UARTs with IrDA support including one UART with ISO7816 smart card support. Variety of data size, format and transmission/reception settings supported for multiple industrial communication protoc " > The K10 MCU fa...

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PK10DX256ZVMD10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB-512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up to two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , ,Connectivity and Communications , , Up to six UARTs with IrDA support including one UART with ISO7816 smart card support. Variety of data size, format and transmission/reception settings supported for multiple industrial communication protoc " > The K10 MCU fa...

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PK10DN512ZVLK10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB-512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up to two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , ,Connectivity and Communications , , Up to six UARTs with IrDA support including one UART with ISO7816 smart card support. Variety of data size, format and transmission/reception settings supported for multiple industrial communication protoc " > The K10 MCU fa...

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PK10DN512ZVLL10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB-512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up to two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , ,Connectivity and Communications , , Up to six UARTs with IrDA support including one UART with ISO7816 smart card support. Variety of data size, format and transmission/reception settings supported for multiple industrial communication protoc " > The K10 MCU fa...

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PK10DN512ZVLQ10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB-512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up to two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , ,Connectivity and Communications , , Up to six UARTs with IrDA support including one UART with ISO7816 smart card support. Variety of data size, format and transmission/reception settings supported for multiple industrial communication protoc " > The K10 MCU fa...

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PK10DN512ZVMC10

恩智浦/飞思卡尔

350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB-512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up to two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , ,Connectivity and Communications , , Up to six UARTs with IrDA support including one UART with ISO7816 smart card support. Variety of data size, format and transmission/reception settings supported for multiple industrial communication protoc " > The K10 MCU fa...

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