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LATTICE

莱迪思半导体公司成立于 1983 年,总部设在美国俄勒冈州波特兰市,是智能连接解决方案的全球领导者。 他们提供市场领先的知识产权和低功耗、小尺寸器件,能够让 8,000 多个全球客户快速实现与众不同的创新的经济、节能产品。 该公司在广泛的终端市场上四处出击,产品覆盖从消费电子到工业设备、通信基础设施和许可。
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ISPLSI2032-135LT48I
型号:
ISPLSI2032-135LT48I
品牌:
LATTICE
产品分类:
集成电路
描述:
Description The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 2032 and 2032A feature 5V in system programmability and in-system diagnostic capabilities. The ispLSI 2032 and 2032A offer nonvolatile reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems. Features • ENHANCEMENTS    — ispLSI 2032A is Fully Form and Function Compat to the ispLSI 2032, with Identical Timing Specifcations and Packaging    — ispLSI 2032A is Built on an Advanced 0.35 Micron E2CMOS® Technology • HIGH DENSITY PROGRAMMABLE LOGIC    — 1000 PLD Gates    — 32 I/O Pins, Two Dedicated Inputs    — 32 Registers    — High Speed Global Interconnect    — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.    — Small Logic Block Size for Random Logic • HIGH PERFORMANCE E2CMOS® TECHNOLOGY    — fmax = 180 MHz Maximum Operating Frequency    — tpd = 5.0 ns Propagation Delay    — TTL Compatible Inputs and Outputs    — Electrically Erasable and Reprogrammable    — Non-Volatile    — 100% Tested at Time of Manufacture    — Unused Product Term Shutdown Saves Power • IN-SYSTEM PROGRAMMABLE    — In-System Programmable (ISP™) 5V Only    — Increased Manufacturing Yields, Reduced Time-to Market and Improved Product Quality    — Reprogram Soldered Devices for Faster Prototyp • OFFERS THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBIL OF FIELD PROGRAMMABLE GATE ARRAYS    — Complete Programmable Device Can Combine G Logic and Structured Designs    — Enhanced Pin Locking Capability    — Three Dedicated Clock Input Pins    — Synchronous and Asynchronous Clocks    — Programmable Output Slew Rate Control to Minimize Switching Noise    — Flexible Pin Placement    — Optimized Global Routing Pool Provides Global Interconnectivity
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