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基于ADI公司的ADSP-CM403F混合信号控制处理器开发方案

来源: 中电网
2019-04-11
类别:工业控制
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文章创建人 拍明

原标题:ADI ADSP-CM403F混合信号控制处理器开发方案

  ADI公司的ADSP-CM403F是基于ARM Cortex-M4内核的混合信号控制处理器, 具有浮点运算单元,工作频率高达240MHz,并集成了高达384KB SRAM,2MB闪存,加速器和外设备以及包括两个16位SAR型ADC和两个12位DAC的模拟模块,适合用在马达控制,嵌入式工业,仪表,医疗和消费类电子.本文介绍了ADSP-CM40x系列主要特性,框图,模拟子系统框图和ARM Cortex-M4内核框图,以及ADSP-CM403F评估板主要特性,框图电路图和材料清单.

  The ADSP-CM40x family of mixed-signal control processors is based on the ARM® Cortex-M4TM processor core with floatingpoint unit operating at frequencies up to 240 MHz and integrating up to 384KB of SRAM memory, 2MB of flash memory, accelerators and peripherals optimized for motor control and photo-voltaic (PV) inverter control and an analog module consisting of two 16-bit SAR-type ADCs and two 12-bit DACs. The ADSP-CM40x family operates from a single voltage supply (VDD_EXT/VDD_ANA), generating its own internal voltage supplies using internal voltage regulators and an external pass transistor.

  This family of mixed-signal control processors offers low static power consumption and is produced with a low-power and lowvoltage design methodology, delivering world class processor and ADC performance with lower power consumption.

  By integrating a rich set of industry-leading system peripherals and memory, the ADSP-CM40x mixed-signal control processors are the platform of choice for next-generation applications that require RISC programmability, advanced communications and leading-edge signal processing in one integrated package. These applications span a wide array of markets including power/motor control, embedded industrial, instrumentation, medical and consumer.

  Each ADSP-CM40x family member contains the following modules.

  • 8 GP timers with PWM output

  • 3-Phase PWM units with up to 4 output pairs per unit

  • 2 CAN modules

  • 1 two-wire interface (TWI) module

  • 3 UARTs

  ADSP-CM40x系列主要特性:

  100 MHz to 240 MHz ARM Cortex-M4 with floating-point unit

  128K Byte to 384K Byte zero-wait-state L1 SRAM with

  16K Byte L1 cache

  Up to 2M Byte flash memory

  16-bit asynchronous external memory interface

  Enhanced PWM units

  Four 3rd/4th order SINC filters for glueless connection of isolated ADCs

  Harmonic analysis engine

  10/100 Ethernet MAC

  Full Speed USB On-the-Go (OTG)

  Two CAN (controller area network) 2.0B interfaces

  Three UART ports

  Two Serial Peripheral Interface (SPI-compatible) ports

  Eight 32-bit general-purpose timers

  Four Encoder Interfaces, 2 with frequency division

  Single power supply

  176-lead (24 mm × 24 mm) RoHS compliant LQFP package

  120-lead (14 mm × 14 mm) RoHS compliant LQFP package

  ANALOG SUBSYSTEM FEATURES

  ADC controller (ADCC) and DAC controller (DACC)

  Two 16-bit SAR ADCs with up to 24 multiplexed inputs, supporting dual simultaneous conversion in 380 ns (16-bit, no missing codes, ±3.5LSB INL)

  Two 12-bit R-string DACs, with output rate up to 50 kHz

  Two 2.5 V precision voltage reference outputs

  图1. ADSP-CM40x系列框图

  图2. ADSP-CM402F/3F模拟子系统框图

  图3. ADSP-CM40x系列中内核Cortex-M4框图

  ADSP-CM403F评估板

  The evaluation board is designed to be used in conjunction with the IAR Embedded Workbench development tools to test capabilities of the ADSP-CM403F processors. The development environment aids advanced application code development and debug, such as:

  • Create, compile, assemble, and link application programs written in C++, C, and assembly

  • Load, run, step, halt, and set breakpoints in application programs

  • Read and write data and program memory

  • Read and write core and peripheral registers

  图4.ADSP-CM403F评估板外形图

  ADSP-CM403F评估板主要特性:

  • Analog Devices ADSP-CM403F processor

  • 120-pin LQFP package

  • 30 MHz CLKIN core oscillator

  • Universal Asynchronous Receiver/Transmitter (UART0)

  • Analog Devices ADM3252E RS-232 line transceiver

  • DB9 female connector

  • Controller Area Network (CAN) interface

  • Analog Devices ADM3053 transceiver

  • RJ11 connector

  • Display

  • New Haven NHD-0220D3Z-FL-GBW

  • 2  20 character

  • 2-wire interface (TWI) control

  • RESET controller

  • Analog Devices ADM708 microprocessor supervisory circuits

  • Debug (JTAG/SWD/SWV/TRACE) interface

  • JTAG/SWD 20-pin 0.1” header for use with IAR emulators

  • Trace/JTAG/SWD/SWV 20-pin 0.05” header

  • LEDs

  • Six LEDs: one power (green), one board reset (red), one SYS_FAULT (red), and three general-purpose (amber)

  • Push buttons

  • Three push buttons: one reset, two IRQ/Flag

  • Asynchronous connector

  • 180-pin Samtec (QSH-090-01-F-D-A) 0.5 mm spacing

  • SMC0 address, data, and control

  • CLKOUT

  • SPI0

  • UART2

  • TWI0

  • GPIOs

  • RESET

  • GND/3.3V/5V output

  • Pulse-width modulation (PWM) connector

  • 180-pin Samtec (QSH-090-01-F-D-A) 0.5 mm spacing

  • PWM0–PWM2

  • SINC0

  • SPI0

  • TWI0

  • TM0

  • CNT0–CNT1

  • SPORT1

  • GPIO

  • RESET

  • GND/3.3V/5V output

  • 5V input

  • Analog connector interface

  • 120-pin Samtec (QSH-060-01-F-D-A) 0.5 mm spacing

  • ADC0–ADC1

  • DAC0–1

  • AGND/GND/VREF/5V output

  • ADR441 voltage reference (VREF)

  • ADA4899 buffer—0.1” header for reference

  • External power supply

  • CE compliant

  • 5V @ 3.6 Amps

  • Ability to power from the PWM connector

  • Other features

  • 0.05-ohm resistors for processor current measurement

  图5.ADSP-CM403F评估板EZ-KIT Lite框图

  ADSP-CM403F评估板EZ-KIT Lite材料清单:



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