原标题：Cypress PSoC 4 ARM 32位MCU马达控制方案

　　cypress公司的PSoC® 4是具有ARM® Cortex™-M0 CPU的可升级和可配置的平台架构,包括有可编程和可配置模拟和数字区块以及灵活的自动路径.PSoC® 4中的32位MCU子系统工作频率24MHz,具有单周器乘法器,集成了读加速器的128KB闪存,16KB SRAM和DMA引擎,低功耗1.71V-5.5V工作,主要用在马达控制应用.本文介绍了PSoC® 4 MCU主要特性,功能框图,无传感器BLDC和步进马达控制项目框图以及马达控制评估板CY8CKIT-037主要特性,硬件框图,和电路图,材料清单和PCB设计图.

　　PSoC® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with anARM® Cortex™-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. ThePSoC 4100M product family, based on this platform architecture, is a combination of a microcontroller with digital programmable logic,programmable analog, programmable interconnect, high-performance analog-to-digital conversion, opamps with comparator mode,and standard communication and timing peripherals. The PSoC 4100M products will be fully compatible with members of the PSoC 4platform for new applications and design needs. The programmable analog and digital subsystems allow flexibility and in-field tuningof the design.The PSoC 4100-M devices include extensive support forprogramming, testing, ebugging, and tracing both hardwareand firmware.

　　The ARM Serial_Wire Debug (SWD) interface supports allprogramming and debug features of the device.Complete debug-on-chip functionality enables full-devicedebugging in the final system using the standard productiondevice. It does not require special interfaces, debugging pods,simulators, or emulators. Only the standard programmingconnections are required to fully support debug.

　　The PSoC Creator Integrated Development Environment (IDE)provides fully integrated programming and debug support forPSoC 4100-M devices. The SWD interface is fully compatiblewith industry-standard third-party tools. The PSoC 4100-Mfamily provides a level of security not possible with multi-chipapplication solutions or with microcontrollers. This is due to itsability to disable debug features, robust flash protection, andbecause it allows customer-proprietary functionality to be implementedin on-chip programmable blocks.

　　The debug circuits are enabled by default and can only bedisabled in firmware. If not enabled, the only way to re-enablethem is to erase the entire device, clear flash protection, andreprogram the device with new firmware that enables debugging.

　　Additionally, all device interfaces can be permanently disabled(device security) for applications concerned about phishingattacks due to a maliciously reprogrammed device or attempts todefeat security by starting and interrupting flash programmingsequences. Because all programming, debug, and test interfacesare disabled when maximum device security is enabled,PSoC 4100-M with device security enabled may not be returnedfor failure analysis. This is a trade-off the PSoC 4100-M allows the customer to make.

　　PSoC® 4主要特性:

　　32-bit MCU Subsystem

　　■ 24-MHz ARM Cortex-M0 CPU with single-cycle multiply

　　■ Up to 128 kB of flash with Read Accelerator

　　■ Up to 16 kB of SRAM

　　■ DMA engine

　　Programmable Analog

　　■ Fouropamps that operate in Deep Sleep mode at very lowcurrent levels

　　■ Allopamps have reconfigurable high current pin-drive,high-bandwidth internal drive, ADC input buffering, andComparator modes with flexible connectivity allowing input

　　connections to any pin

　　■ Four current DACs (IDACs) for general-purpose or capacitivesensing applications on any pin

　　■ Two low-power comparators that operate in Deep Sleep mode

　　■ 12-bit SAR ADC with 806-Ksps conversion rate

　　Low Power 1.71 to 5.5 V Operation

　　■ 20-nA Stop Mode with GPIO pin wakeup

　　■ Hibernate and Deep Sleep modes allow wakeup-time versuspower trade-offs

　　Capacitive Sensing

　　■ Cypress Capacitive Sigma-Delta (CSD) technique providesbest-in-class SNR (>5:1) and water tolerance

　　■ Cypress-supplied software component makes capacitivesensing design easy

　　■ Automatic hardware tuning (SmartSense™)

　　Segment LCD Drive

　　■ LCD drive supported on all pins (common or segment)

　　■ Operates in Deep Sleep mode with 4 bits per pin memory

　　Serial Communication

　　■ Four independent run-time reconfigurable serialcommunication blocks (SCBs) with reconfigurable I2C, SPI, orUART functionality

　　Timing and Pulse-Width Modulation

　　■ Eight 16-bit timer/counter pulse-width modulator (TCPWM)blocks

　　■ Center-aligned, Edge, and Pseudo-random modes

　　■ Comparator-based triggering of Kill signals for motor drive andother high-reliability digital logic applications

　　Package Options

　　■ 68-pin QFN, 64-pin TQFP wide and narrow pitch, and 48-pinand 44-pin TQFP packages

　　■ Up to 55 programmable GPIOs

　　■ GPIO pins can be CapSense, LCD, analog, or digital

　　■ Drive modes, strengths, and slew rates are programmable

　　Extended Industrial Temperature Operation

　　■ –40 °C to +105 °C operation

　　PSoC Creator Design Environment

　　■ Integrated Development Environment (IDE) providesschematic design entry and build (with analog and digitalautomatic routing)

　　■ Applications Programming Interface (API component) for allfixed-function and programmable peripherals

　　Industry-Standard Tool Compatibility

　　■ After schematic entry, development can be done withARM-based industry-standard development tools

　　图1.PSoC® 4 MCU框图

　　PSoC® 4马达控制评估板CY8CKIT-037

　　Thanks for your interest in the CY8CKIT-037 PSoC® 4 Motor Control Evaluation Kit (EVK). This kit enables engineers to evaluate Cypress’s PSoC family of devices for motor control applications. Based on this kit, customers can create control solutions for three dominant motor types: permanent magnet synchronous motor (PMSM), stepper, and brushless DC (BLDC).

　　The Cypress PSoC family of devices integrates abundant internal resources for motor control applications, such as Timer Counter Pulse Width Modulator (TCPWM), SAR-ADC, comparators, opamps, and universal digital blocks (UDBs). In addition, an ARM® Cortex™ core enables high-performance motor control solutions on PSoC devices. Headers provided on the EVK board allow you to connect it to the CY8CKIT-042 PSoC 4 Pioneer Kit board to create a complete motor control system.

　　This kit guide documents the circuit structure of the Motor Control EVK board and explains how to configure it to create a solution for different motor types. It provides five example projects that cover sensored and sensorless BLDC control, PMSM sensorless field-oriented control (FOC), and stepper motor microstepping control. It also introduces the Bridge Control Panel (BCP) as a debugging tool in the motor control development process.

　　The motor control system can be separated into two parts: the driver board and the controller board. The CY8CKIT-037 Motor Control EVK is the driver board, which contains the DC/DC power circuit, dual H-bridge circuit, motor current and bus voltage sampling and processing circuit, protection circuit, user configuration circuit, and connectors to the controller board. The controller board receives the signals, implements the proper algorithm to process them, and then generates control signals to the driver board to run the motor. Figure 3-1 shows the EVK board and its general description. CY8CKIT-037 EVK is the driver board; the CY8CKIT-042 kit works as controller board. They are interfaced with Arduino-compatible connectors.

　　PSoC® 4马达控制评估板CY8CKIT-037包括:

　　CY8CKIT-037 PSoC 4 Motor Control EVK main board

　　AC-DC 24 V/2.0 A power adapter

　　BLY172S-24V-4000 BLDC motor with sinusoidal back electromotive force

　　USB-A to mini-B cable

　　Configuration Jumpers

　　Fuse

　　Screwdriver

　　Related documents:

　　Kit guide (this document)

　　Quick start guide

　　Release notes

　　图2.PSoC® 4马达控制评估板CY8CKIT-037外形和描述图

　　PSoC® 4马达控制评估板CY8CKIT-037材料清单: