原标题：ADI AD9279 8路超声波系统接收解决方案

　　ADI 公司的AD9279是8路LNA/VGA/AAF/ADC和CW I/Q解调器,包括了8路可变增益放大器(VGA)和低噪音前置放大器(LNA), 抗混淆滤波器(AAF),模数转换器(ADC)以及带可变肠相位旋转的I/Q解调器,每路增益45dB,TGC模式和40MSPS时的每路功耗 141mW,CW模式每路功耗60mW,主要用在医疗超声波和汽车雷达.本文介绍了AD9279主要特性,单路方框图, 超声波系统方框图以及AD9279各种输入电路, 单端1.8V/3.3V CMOS取样时钟电路图和CW模式 I/O输出接口连接典型电路图.

　　Octal LNA/VGA/AAF/ADC and CW I/Q Demodulator

　　The AD9279 is designed for low cost, low power, small size, and ease of use for medical ultrasound and automotive radar. It contains eight channels of a variable gain amplifier (VGA) with a low noise preamplifier (LNA), an antialiasing filter (AAF), an analog-to-digital converter (ADC), and an I/Q demodulator with programmable phase rotation.

　　Each channel features a variable gain range of 45 dB, a fully differential signal path, an active input preamplifier termination, and a maximum gain of up to 52 dB. The channel is optimized for high dynamic performance and low power in applications where a small package size is critical.

　　The LNA has a single-ended-to-differential gain that is selectable through the SPI. Assuming a 15 MHz noise bandwidth (NBW) and a 21.3 dB LNA gain, the LNA input SNR is roughly 94 dB. In CW Doppler mode, each LNA output drives an I/Q demod-ulator that has independently programmable phase rotation with 16 phase settings.

　　Power-down of individual channels is supported to increase battery life for portable applications. Standby mode allows quick power-up for power cycling. In CW Doppler operation, the VGA, AAF, and ADC are powered down. The ADC contains several features designed to maximize flexibility and minimize system cost, such as a programmable clock, data alignment, and programmable digital test pattern generation. The digital test patterns include built-in fixed patterns, built-in pseudo random patterns, and custom user-defined test patterns entered via the serial port interface.

　　AD9279主要特性:

　　8 channels of LNA, VGA, AAF, ADC, and I/Q demodulator

　　Low power: 141 mW per channel, TGC mode, 40 MSPS;

　　60 mW per channel, CW mode

　　10 mm × 10 mm, 144-ball CSP-BGA

　　TGC channel input-referred noise: 0.8 nV/√Hz, max gain

　　Flexible power-down modes

　　Fast recovery from low power standby mode: <2 μs

　　Overload recovery: <10 ns

　　Low noise preamplifier (LNA)

　　Input-referred noise: 0.75 nV/√Hz, gain = 21.3 dB

　　Programmable gain: 15.6 dB/17.9 dB/21.3 dB

　　0.1 dB compression: 1000 mV p-p/ 750 mV p-p/450 mV p-p

　　Dual-mode active input impedance matching

　　Bandwidth (BW): >100 MHz

　　Variable gain amplifier (VGA)

　　Attenuator range: −45 dB to 0 dB

　　Postamp gain (PGA): 21 dB/24 dB/27 dB/30 dB

　　Linear-in-dB gain control

　　Antialiasing filter (AAF)

　　Programmable second-order LPF from 8 MHz to 18 MHz

　　Programmable HPF

　　Analog-to-digital converter (ADC)

　　SNR: 70 dB, 12 bits up to 80 MSPS

　　Serial LVDS (ANSI-644, low power/reduced signal)

　　CW mode I/Q demodulator

　　Individual programmable phase rotation

　　Output dynamic range per channel: >160 dBc/√Hz

　　Output-referred SNR: 155 dBc/√Hz,1 kHz offset,−3 dBFS

　　图1.AD9279功能方框图

　　图2.AD9279单路简化方框图

　　图3.AD9279简化超声波系统方框图

　　图4.AD9279变压器耦合差分时钟电路图

　　图5.AD9279差分PECL取样时钟电路图

　　图6.AD9279差分LVDS取样时钟电路图

　　图7.AD9279单端1.8V CMOS取样时钟电路图

　　图8.AD9279单端3.3V CMOS取样时钟电路图

　　图9.AD9279 CW模式 I/O输出接口连接典型电路图