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NXP/FREESCALE

恩智浦半导体使安全更智能的联系和基础设施建设,推进解决方案,让生活变得更容易,更好更安全。随着嵌入式应用的安全连通性解决方案的全球领导者,恩智浦在安全连接车辆驱动创新,端到端的安全与隐私和智能连接解决方案市场。内置超过60年的综合经验和专业知识,公司在35多个国家拥有45000名员工。飞思卡尔半导体已由恩智浦半导体收购。飞思卡尔半导体零件现在是NXP家族的一部分(12月2015)。
为您找到相关结果 54970 2803 /2749
PK10DN512ZVLK10
型号:
PK10DN512ZVLK10
品牌:
恩智浦/飞思卡尔
产品分类:
其他单片机
描述:
350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB-512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up to two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , ,Connectivity and Communications , , Up to six UARTs with IrDA support including one UART with ISO7816 smart card support. Variety of data size, format and transmission/reception settings supported for multiple industrial communication protoc"> The K10 MCU family is the entry point into the Kinetis portfolio. Devices start from 128 KB of flash in a small-footprint 80-pin LQFP package extending up to 512 KB in a 144-pin MAPBGA package with a rich suite of analog, communication, timing and control peripherals. Pin compatibility, flexible low-power capabilities and innovative FlexMemory help to solve many of the major pain points for system implementation., ,Features,Ultra-Low-Power , , 10 low-power modes with power and clock gating for optimal peripheral activity and recovery times. Stop currents down to 2 µA, and run currents of <350 181="" a="" mhz="" with="" 4="" s="" wake-up="" from="" stop="" mode="">350> , , Full memory and analog operation down to 1.71 volts for extended battery life , , Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes , , Low-power timer for continual system operation in reduced power state , ,Flash, SRAM and FlexMemory , , 128 KB-512 KB flash. Fast access, high reliability with four-level security protection , , 32 KB-128 KB of SRAM , , FlexMemory: 32 bytes-4 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, up to 256 KB can be used for extra program code, data or EEPROM backup , ,Mixed-Signal Capability , , Two high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering , , Up to two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications , , Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state , , Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost , ,Performance , , ARM® Cortex™-M4 core with DSP, 100MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions , , 16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput , , Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth , , Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines , ,Timing and Control , , Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control , , Carrier modulator timer for infrared waveform generation in remote control applications , , Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block , ,Human-Machine Interface , , Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick , ,Connectivity and Communications , , Up to six UARTs with IrDA support including one UART with ISO7816 smart card support. Variety of data size, format and transmission/reception settings supported for multiple industrial communication protoc
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